MCF51JE128 Datasheet | Motorola Semiconductor

features are available in all devices or packages; see Table 2 for a parison of features by device. 80-LQFP 12mm x 12mm 81-BGA 10mm x 10mm 100-LQFP 14mm x 14mm 104-BGA 10mm x 10mm 32-Bit Cold Fire V1 Central Processor Unit (CPU) - Up to 50.33-MHz Cold Fire CPU above 2.4 V and 40 MHz CPU above 2.1 V and 20 MHz CPU above 1.8 V across temperature range of -40°C to 105°C. - Cold Fire Instruction Set Revision C (ISA_C). - 32-bit multiply and accumulate (MAC) supports signed or unsigned integer or signed fractional inputs. On-Chip Memory - 256 K Flash prised of two independent 128 K flash arrays; read/program/erase over full operating voltage and temperature; allows interrupt processing while programming. - 32 Kbytes System Random-access memory (RAM). - Security circuitry to prevent unauthorized access to RAM and Flash contents. Power-Saving Modes - Two ultra-low power stop modes. Peripheral clock enable register can disable clocks to unused modules to reduce currents. - Time of Day (TOD) - Ultra low-power 1/4 sec counter with up to 64s timeout. - Ultra-low power external oscillator that can be used in stop modes to provide accurate clock source to the TOD. 6 usec typical wake up time from stop3 mode. Clock Source Options - Oscillator (XOSC1) - Loop-control Pierce oscillator; 32.768 k Hz crystal or ceramic resonator dedicated for TOD operation. - Oscillator (XOSC2) for high frequency crystal input for MCG reference to be used for system clock and USB operations. - Multipurpose Clock Generator (MCG) - PLL and FLL; precision trimming of internal reference allows 0.2% resolution and 2% deviation over temperature and voltage; supports CPU frequencies from 4 k Hz to 50 MHz. System Protection - Watchdog puter operating properly (COP) reset with option to run from dedicated 1 k Hz internal clock source or bus clock. - Low-voltage detection with reset or interrupt; selectable trip points; separate low voltage warning with optional interrupt; selectable trip points. - Illegal...