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12 2N40 (SILICON)
~E3~ (TO·60)
stud isolated from case
NPN silicon annular transistor, designed for frequency multiplication applications.
MAXI MUM RATI NGS (TA = 25°C unless otherwise noted)
Rating
Symbol
Collector-Emitter Voltage
Collector-Emitter Voltage (VEB(off) = 1. 5 Vdc)
VCEO VCEV
Collector-Base Voltage
VCB
Emitter-Base Voltage
VEB
Collector Current
IC
Total Device Dissipation @ TA = 25°C
PD
Derate Above 25°C
Operating and Storage Junction Temperature Range TJ,Tstg
Value
40 65
65 4.0 1.5 11.6 66.3 -65 to +200
Unit
Vdc Vdc
Vdc Vdc Amps Watts mW;oC °c
FIGURE 1 - TRIPLER TEST CIRCUIT
h .=. f,.~ 334 MHz
+28 V
r-
- - - - - -17JZZ2'~:zzzzzzzz~ItiZZ02.Z2zpmfzzz:ZZZZZZZZzmzzzz:~
2.7!l
O.s..IOpF
1000 pf
RFC I ~ 0.22 /LH RFC, ~ 0.33 OHMS, W. W.
2N4012 Datasheet
