Motorola 74LS377
74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The SN54 / 74LS378 is a 6-Bit Register with a buffered common enable.| Part No. | 74LS377 |
|---|---|
| Datasheet | 74LS377 Download |
| Manufacturer |  Motorola |
| Description | OCTAL D FLIP-FLOP |
| Buy | Stock & Price |
OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / This device is similar to the SN54 / 74LS174, but with common Enable rather than common Master Reset. The SN54 / 74LS379 is a 4-Bit Register with buffered common Enable. This device is similar to the SN54 / 74LS175 but features the common Enable rather then common Master Reset. SN54/74LS377 SN54/74LS378 SN54/74LS379 OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE LOW POWER SCHOTTKY
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● 8-Bit High Speed Parallel Registers Positive Edge-Triggered D-Type Flip Flops Fully Buffered Common Clock and Enable Inputs True and Complement Outputs Input Clamp Diodes Limit High Speed Termination Effects 20 1 J SUFFIX CERAMIC CASE 732-03 PIN NAMES LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. 5 (2.5) U.L. 20 1 N SUFFIX PLASTIC CASE 738-03 E D0 – D3 CP Q0 – Q3 Q0 – Q3 Enable (Active LOW) Input Data Inputs Clock (Active HIGH Going Edge) Input True Outputs (Note b) Complemented Outputs (Note b) 0.5 U.L.
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● 8-Bit High Speed Parallel Registers Positive Edge-Triggered D-Type Flip Flops Fully Buffered Common Clock and Enable Inputs True and Complement Outputs Input Clamp Diodes Limit High Speed Termination Effects 20 1 J SUFFIX CERAMIC CASE 732-03 PIN NAMES LOADING (Note a) HIGH LOW 0.25 U.L. 0.25 U.L. 0.25 U.L. 5 (2.5) U.L. 5 (2.5) U.L. 20 1 N SUFFIX PLASTIC CASE 738-03 E D0 – D3 CP Q0 – Q3 Q0 – Q3 Enable (Active LOW) Input Data Inputs Clock (Active HIGH Going Edge) Input True Outputs (Note b) Complemented Outputs (Note b) 0.5 U.L.
