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DSP56156 Datasheet PDF

Motorola DSP56156

The DSP56156 is a general-purpose MPU-style Digital Signal Processor (DSP). This combination of features makes the DSP56156 a cost-effective, high-performance solution for many DSP applications, especially speech coding, digital communications, and cellular base stations. The central processing unit of the DSP56156 is the DSP56100 core processor.
Part No. DSP56156
Datasheet DSP56156 Download
Manufacturer
Motorola
Description 16-bit Digital Signal Processor
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DSP56156 datasheet page 1 preview

FEATURES

DSP56156

FEATURES

Digital Signal Processing Core
● Efficient, object code compatible, 16-bit 56100-Family DSP engine — — — — — — — — — — — — — Up to 30 Million Instructions Per Second (MIPS) – 33 ns instruction cycle at 60 MHz Up to 180 Million Operations Per Second (MOPS) at 60 MHz Highly parallel instruction set with unique DSP addressing modes Two 40-bit accumulators including extension byte Parallel 16 × 16-bit multiply-accumulate in 1 instruction cycle (2 clock cycles) Double precision 32 × 32-bit multiply with 72-bit result in 6 instruction cycles Least Mean Square (LMS) adaptive loop filter in 2 instructions 40-bit Addition/Subtraction in 1 instruction cycle Fractional and integer arithmetic with support for multiprecision arithmetic Hardware support for block-floating point FFT Hardware-nested DO loops including infinite loops Zero-overhead fast interrupts (2 instruction cycles) Three 16-bit internal data buses and three 16-bit internal address buses for maximum information transfer on-chip Freescale Semiconductor, Inc...
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