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DSP56F826 - 16-bit Digital Signal Processor

General Description

Sixteen (16) dedicated general purpose I/O (GPIO) pins Thirty (30) shared general purpose I/O (GPIO) pins Computer-Operating Properly (COP) Watchdog timer Two external interrupt pins External reset pin for ha

Key Features

  • 1.1.1.
  • Digital Signal Processing Core Efficient 16-bit DSP56800 Family DSP engine with dual Harvard architecture As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) Two 36-bit accumulators, including extension bits 16-bit bidirectional barrel shifter Parallel instruction.

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The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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www.DataSheet4U.com Semiconductor Products Sector DSP56F826/D Rev. # 0, 3/2001 DSP56F826 Preliminary Technical Data DSP56F826 16-bit Digital Signal Processor • • • • Up to 40 MIPS at 80MHz core frequency DSP and MCU functionality in a unified, C-efficient architecture Hardware DO and REP loops MCU-friendly instruction set supports both DSP and controller functions: MAC, bit manipulation unit, 14 addressing modes 31.