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DSP56F826 Datasheet PDF

Motorola DSP56F826

The DSP56F826 is a member of the DSP56800 core-based family of Digital Signal Processors (DSPs). It combines, on a single chip, the processing power of a DSP and the functionality of a microcontroller with a flexible set of peripherals to create an extremely cost-effective solution for
Part No. DSP56F826
Datasheet DSP56F826 Download
Manufacturer
Motorola
Description 16-bit Digital Signal Processor
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DSP56F826 datasheet page 1 preview

FEATURES

1.1.1
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● Digital Signal Processing Core Efficient 16-bit DSP56800 Family DSP engine with dual Harvard architecture As many as 40 Million Instructions Per Second (MIPS) at 80MHz core frequency Single-cycle 16 × 16-bit parallel Multiplier-Accumulator (MAC) Two 36-bit accumulators, including extension bits 16-bit bidirectional barrel shifter Parallel instruction set with unique DSP addressing modes Hardware DO and REP loops Three internal address buses and one external address bus Four internal data buses and one external data bus Instruction set supports both DSP and controller functions Controller style addressing modes and instructions for compact code Efficient C Compiler and local variable support Software subroutine and interrupt stack with depth limited only by memory JTAG/OnCE Debug Programming Interface 1.1.2
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● Memory Harvard architecture permits as many as three simultaneous accesses to program and data memory On-chip memory including a low co...
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