MC100EL39 - 2/4 /4/6 Clock Generation Chip

PIN CLK EN MR VBB Q0, Q1 Q2, Q3 DIVSEL FUNCTION Diff Clock Inputs Sync Enable Master Reset Reference Output Diff ÷2/4 Outputs Diff ÷4/6 Outputs Frequency Select Input FUNCTION TABLE CLK Z ZZ X EN L H X MR L L H FUNCTION Divide Hold Q0 3 Reset Q0 3

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