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MC100ELT28 - TTL to Differential Pecl/Differential PECL to TTL Translator

Download the MC100ELT28 datasheet PDF. This datasheet also covers the MC10ELT28 variant, as both devices belong to the same ttl to differential pecl/differential pecl to ttl translator family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • The ELT28 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels.
  • 3.5ns Typical PECL to TTL Propagation Delay.
  • 1.2ns Typical TTL to PECL Propagation Delay.
  • Differential PECL Inputs/Ouputs.
  • Small Outline SOIC Package.
  • PNP TTL Inputs for Minimal Loading.
  • 24mA TTL Outputs.
  • Flow Thr.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MC10ELT28-Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Advance Information TTL to Differential PECL/Differential PECL to TTL Translator The MC10ELT/100ELT28 is a differential PECL to TTL translator and a TTL to differential PECL translator in a single package. Because PECL (Positive ECL) levels are used only +5V and ground are required. The small outline 8-lead SOIC package and the dual translation design of the ELT28 makes it ideal for applications which are sending and receiving signals across a backplane. Because the mature MOSAIC 1.5 process is used, low cost can be added to the list of features. The ELT28 is available in both ECL standards: the 10ELT is compatible with positive MECL 10H logic levels while the 100ELT is compatible with positive ECL 100K logic levels. • 3.