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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Triple PECL to LVPECL Translator
The MC100LVEL92 is a triple PECL to LVPECL translator. The device receives standard PECL signals and translates them to differential LVPECL output signals.
• 500ps Propagation Delays • Fully Differential Design • 20–Lead SOIC Package • 5V and 3.3V Supplies Required • >1500V ESD
A PECL VBB output is provided for interfacing single ended PECL signals at the inputs. If a single ended PECL input is to be used the PECL VBB output should be connected to the D input and the active signal will drive the D input. When used the PECL VBB should be bypassed to ground via a 0.01µf capacitor.
MC100LVEL92 Datasheet
