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MC10162 - Binary to 1-8 Decoder(High)

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Datasheet preview – MC10162

Datasheet Details

Part number MC10162
Manufacturer Motorola
File Size 112.47 KB
Description Binary to 1-8 Decoder(High)
Datasheet download datasheet MC10162 Datasheet
Additional preview pages of the MC10162 datasheet.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Binary to 1-8 Decoder (High) The MC10162 is designed to convert three lines of input data to a one–of–eight output. The selected output will be high while all other outputs are low. The enable inputs, when either or both are high, force all outputs low. The MC10162 is a true parallel decoder. No series gating is used internally, eliminating unequal delay times found in other decoders. This device is ideally suited for demultiplexer applications. One of the two enable inputs is used as the data input, while the other is used as a data enable input. A complete mux/demux operation on 16 bits for data distribution is illustrated in Figure 1 of the MC10161 data sheet. PD = 315 ns typ/pkg (No Load) tpd = 4.0 ns typ tr, tf = 2.
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