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MC10E016 - 8-Bit Synchronous Binary Up Counter

Download the MC10E016 datasheet PDF. This datasheet also covers the MC100E016 variant, as both devices belong to the same 8-bit synchronous binary up counter family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • internal feedback of TC, gated by the TCLD (terminal count load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pull-downs), the TC feedback is disabled, and counting proceeds continuously, with TC going LOW to indicate an all-one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter. The Qn outputs do not need to be terminated for the count function to operate properly.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MC100E016-Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8ĆBit Synchronous Binary Up Counter MC10E016 MC100E016 The MC10E/100E016 is a high-speed synchronous, presettable, cascadable 8-bit binary counter. Architecture and operation are the same as the MC10H016 in the MECL 10H family, extended to 8-bits, as shown in the logic symbol. The counter features internal feedback of TC, gated by the TCLD (terminal count load) pin. When TCLD is LOW (or left open, in which case it is pulled LOW by the internal pull-downs), the TC feedback is disabled, and counting proceeds continuously, with TC going LOW to indicate an all-one state. When TCLD is HIGH, the TC feedback causes the counter to automatically reload upon TC = LOW, thus functioning as a programmable counter.