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MC10E116 - QUINT DIFFERENTIAL LINE RECEIVER

Key Features

  • clamp circuitry to cause a defined state if both the inverting and non-inverting inputs are left open; in this case the Q output goes LOW, while the Q output goes HIGH. This feature makes the device ideal for twisted pair.

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📁 Similar Datasheet

Part Number Description Manufacturer
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Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MC10E111 1:9 DIFFERENTIAL CLOCK DRIVER
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MC10E101 Quad 4-Input OR/NOR Gate
MC10E104 QUINT 2-INPUT AND/NAND GATE
MC10E107 QUINT 2-INPUT XOR/XNOR GATE

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Quint Differential Line Receiver MC10E116 MC100E116 The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. An internally generated reference supply (VBB) is available for single-ended reception. • 500ps Max. Propagation Delay • VBB Supply Output • Dedicated VCCO Pin for Each Receiver • Extended 100E VEE Range of – 4.2V to – 5.46V • 75kΩ Input Pulldown Resistors QUINT DIFFERENTIAL LINE RECEIVER Active current sources plus a deep collector feature of the MOSAIC III process provide the receivers with excellent common-mode noise rejection. Each receiver has a dedicated VCCO supply lead, providing optimum symmetry and stability.