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MC10H607 - Registered Hex PECL/TTL Translator

Key Features

  • differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 24mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input. With its differential PECL inputs and TTL outputs the H607 device is ideally suited for the receive function of a HPPI bus type board.
  • to.
  • board interface.

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📁 Similar Datasheet

Part Number Description Manufacturer
MC10H607 Registered Hex PECL/TTL Translator ON Semiconductor
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Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
MC10H600 9-Bit TTL to ECL Translator
MC10H601 9-Bit ECL/TTL Translator
MC10H602 9-Bit Latch TTL/ECL Translator
MC10H603 9-Bit Latch ECL/TTL Translator
MC10H604 Registered Hex TTL/ECL Translator

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Registered Hex PECL/TTL Translator The MC10H/100H607 is a 6–bit, registered PECL to TTL translator. The device features differential PECL inputs for both data and clock. The TTL outputs feature 48mA sink, 24mA source drive capability for driving high fanout loads or transmission lines. The asynchronous master reset control is an ECL level input. With its differential PECL inputs and TTL outputs the H607 device is ideally suited for the receive function of a HPPI bus type board–to–board interface application. The on chip registers simplify the task of synchronizing the data between the two boards. The device is available in either ECL standard: the 10H device is compatible with MECL 10H™ logic levels, with a VCC of +5.