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MC14044B - CMOS MSI

Download the MC14044B datasheet PDF. This datasheet also covers the MC14044BCL variant, as both devices belong to the same cmos msi family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (MC14044BCL_MotorolaInc.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA CMOS MSI Quad R–S Latches The MC14043B and MC14044B quad R–S latches are constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. Each latch has an independent Q output and set and reset inputs. The Q outputs are gated through three–state buffers having a common enable input. The outputs are enabled with a logical “1” or high on the enable input; a logical “0” or low disconnects the latch from the Q outputs, resulting in an open circuit at the Q outputs. • Double Diode Input Protection • Three–State Outputs with Common Enable • Outputs Capable of Driving Two Low–power TTL Loads or One Low– Power Schottky TTL Load Over the Rated Temperature Range • Supply Voltage Range = 3.