MC14568B Datasheet | Motorola Semiconductor

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Phase parator and Programmable Counters The MC14568B consists of a phase parator, a divide- by- 4, 16, 64 or 100 counter and a programmable divide- by- N 4- bit binary counter (all positive- edge triggered) constructed with MOS P- channel and N- channel enhancement mode devices (plementary MOS) in a monolithic structure. The MC14568B has been designed for use in conjunction with a programmable divide- by- N counter for frequency synthesizers and phase- locked loop applications requiring low power dissipation and/or high noise immunity. This device can be used with both counters cascaded and the output of the second counter connected to the phase parator (CTL high), or used independently of the programmable divide- by- N counter, for example cascaded with a MC14569B, MC14522B or MC14526B (CTL low). L SUFFIX CERAMIC CASE 620 P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ MAXIMUM RATINGS- (Voltages referenced to VSS) Rating Symbol VDD Vin Iin PD TA Tstg DC Supply Voltage Input Voltage, All Inputs DC Input Current, per Pin Power Dissipation, per Package† Operating Temperature Range Storage Temperature Range Value Unit Vdc Vdc m Adc m W - 0.5 to + 18 - 0.5 to VDD + 0.5 ± 10 500 - 55 to + 125 - 65 to + 150 - Supply Voltage Range = 3.0 to 18 V - Capable of Driving Two Low- Power TTL Loads, One Low- Power Schottky TTL Load or Two HTL Loads Over the Rated Temperature Range. - Chip plexity: 549 FETs or 137 Equivalent Gates ORDERING INFORMATION MC14XXXBCP MC14XXXBCL MC14XXXBD Plastic Ceramic SOIC TA = - 55° to 125°C for all packages. TRUTH TABLE F Pin 10 0 0 1 1 G Pin 11 0 1 0 1 Division Ratio of Counter D1 4 16 64 100 _C _C - Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: - 7.0 m W/_C From 65_C To 125_C Ceramic “L” Packages: - 12 m W/_C From 100_C To 125_C The divide by zero state...