MC54HC138A Datasheet | Motorola Semiconductor

features three Chip Select inputs, two active- low and one active- high to facilitate the demultiplexing, cascading, and chip- selecting functions. The demultiplexing function is acplished by using the Address inputs to select the desired device output; one of the Chip Selects is used as a data input while the other Chip Selects are held in their active states. - Output Drive Capability: 10 LSTTL Loads - Outputs Directly Interface to CMOS, NMOS and TTL - Operating Voltage Range: 2.0 to 6.0 V - Low Input Current: 1.0 µA - High Noise Immunity Characteristic of CMOS Devices - In pliance with the Requirements Defined by JEDEC Standard No. 7A - Chip plexity: 100 FETs or 29 Equivalent Gates LOGIC DIAGRAM 1 2 3 15 MC54/74HC138A 16 1 J SUFFIX CERAMIC PACKAGE CASE 620- 10 16 1 N SUFFIX PLASTIC PACKAGE CASE 648- 08 16 1 D SUFFIX SOIC PACKAGE CASE 751B- 05 16 1 DT SUFFIX TSSOP PACKAGE CASE 948F- 01 ORDERING INFORMATION MC54HCXXXAJ MC74HCXXXAN MC74HCXXXAD MC74HCXXXADT ACTIVE- LOW OUTPUTS Ceramic Plastic SOIC TSSOP A0 ADDRESS INPUTS A1 A2 Y0 14 Y1 13 Y2 12 Y3 11 Y4 10 Y5 9 Y6 7 Y7 PIN ASSIGNMENT A0 A1 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC Y0 Y1 Y2 Y3 Y4 Y5 Y6 CHIP- SELECT INPUTS CS1 CS2 CS3 6 4 5 PIN 16 = VCC PIN 8 = GND A2 CS2 CS3 CS1 Y7 FUNCTION TABLE Inputs X X L H H H H H H H H X H X L L L L L L L L H X X L L L L L L L L X X X L L L L H H H H X X X L L H H L L H H X X X L H L H L H L H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H H H H H Outputs H H H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H H H H H H H H H H H L H H H H H H H H H H H L CS1CS2 CS3 A2 A1 A0 Y0 Y1 Y2 Y3 Y4 Y5 Y6 Y7 H = high level (steady state); L = low level (steady state); X = don’t care 10/95 © Motorola, Inc. 1995 REV 6 ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ ÎÎÎÎÎÎÎÎÎÎÎÎÎÎ ÎÎÎÎÎÎ ÎÎÎ ÎÎÎ...