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MC54HC4040A - 12-Stage Binary Ripple Counter

General Description

INPUTS Clock (Pin 10) Negative

edge triggering clock input.

to

low transition on this input advances the state of the counter.

high reset.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA 12-Stage Binary Ripple Counter High–Performance Silicon–Gate CMOS The MC54/74C4040A is identical in pinout to the standard CMOS MC14040. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. This device consists of 12 master–slave flip–flops. The output of each flip–flop feeds the next and the frequency at each output is half of that of the preceding one. The state counter advances on the negative–going edge of the Clock input. Reset is asynchronous and active–high. State changes of the Q outputs do not occur simultaneously because of internal ripple delays.