MC68833 Datasheet | Motorola Semiconductor

Overview 100Base- TX is a LAN standard under IEEE auspices. The twisted pair cable connecting two stations can be up to 100 meters in length. Users are encouraged to refer to the pertinent IEEE 802.3 standard documents for further information. Introduction The MC68833 Twisted Pair Interface Chip (TPIC) is a transceiver capable of transmitting and receiving MLT3 encoded datastreams, as well as handling clock and data recovery. The TPIC implements the lower portion of the physical layer (PHY) functions of the Fast Ethernet standard and, with its Auto Negotiation Fast Link Pulse “Pass Through” capability, is well suited for 100Base- TX applications. It performs a five- bit parallel to serial conversion during transmission, as well as a five- bit serial to parallel conversion during reception. FA SUFFIX TQFP PACKAGE CASE 931- 02 MC68833 Features - - - - - - - Supports Twisted Pair Media Supports MLT- 3 Line Code Selectable Auto Negotiation mode has FLP and NLP “Pass- Through” Capability Controlled Twisted Pair Output Transition Times May Eliminate Need for Transmit Filter Adaptive Receive Equalization supports TP line lengths of 0 to 100 meters TP Receiver Includes Circuitry Which Enables Error Free Reception of Data Distorted with Base Line Wander Twisted Pair (TP) Transceiver plies with ANSI X3T9.5 TP- PMD Standard and the IEEE 802.3 100Base- TX Ethernet Draft Standard - Meets Jitter Requirements of ANSI X3T9.5 TP- PMD - - - - - - - - - - - - - Physical Layer Support for Fast Ethernet Digital Phase- Locked Loop (DPLL) Provides Run Length Immunity Transmit Off Capability for True Quiet Line State Uses a 25 Mhz External Frequency Reference Converts Received Serial Bit Stream to Five- Bit Parallel Form Recovers 125 Mhz Clock from Ining Serial MLT3 Data Stream Generates 25 Mhz Receive Clock Small Number of Passive External ponents Required Selectable Low Power Mode Loop Back Capability Single +5V Power Supply Utilizes 0.8u M Bi CMOS Technology 10m M X 10m M, 64 Pin, TQFP...