MC74HC354 Datasheet | Motorola Semiconductor

MOTOROLA SEMICONDUCTOR TECHNICAL DATA 8-Input Data Selector/ Multiplexer With Data and Address Latches and 3-State Outputs High- Performance Silicon- Gate CMOS The MC54/74HC354 is identical in pinout to the LS354. The device inputs are patible with Standard CMOS outputs; with pullup resistors, they are patible with LSTTL outputs. The HC354 selects one of eight latched binary Data Inputs, as determined by the Address Inputs. The information at the Data Inputs is stored in the transparent 8- bit Data Latch when the Data- Latch Enable pin is held high. The Address information may be stored in the transparent Address Latch, which is enabled by the active- high Address- Enable pin. The device outputs are placed in high- impedance states when Output Enable 1 is high, Output Enable 2 is high, or Output Enable 3 is low. The HC354 has a clocked Data Latch that is not transparent. - Output Drive Capability: 15 LSTTL Loads - Outputs Directly Interface to CMOS, NMOS and TTL - Operating Voltage Range: 2 to 6V - Low Input Current: 1µA - High Noise Immunity Characteristic of CMOS Devices - In pliance With the JEDEC Standard No. 7A Requiremen- ts - Chip plexity: 326 FETs or 81.5 Equivalent Gates LOGIC DIAGRAM DATA INPUTS 8 D0 7 D1 6 D2 5 D3 4 D4 3 D5 2 D6 1 D7 8- BIT DATA LATCH (TRANS- PARENT) 8- BIT MULTI- PLEXER 3- STATE OUTPUT CONTROL 19 Y 18 Y 3- STATE DATA OUTPUTS DATA- LATCH 9 ENABLE ADDRESS INPUTS 14 A0 13 A1 12 A2 ADDRESS- LATCH 11 ENABLE OUTPUT ENABLES 15 OE1 16...