The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Dual J-K Flip-Flop with Reset
High–Performance Silicon–Gate CMOS
The MC74HC107 is identical in pinout to the LS107. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs. Each flip flops negative edge clocked and has an active–low asynchronous reset. The HC107 is identical in function to the HC73, but has a different pinout. • • • • • • Output Drive Capability: 10 LSTTL Loads Outputs Directly Interface to CMOS, NMOS, and TTL Operating Voltage Range: 2 to 6 V Low Input Current: 1 µA High Noise Immunity Characteristic of CMOS Devices In Compliance with the Requirements Defined by JEDEC Standard No.
MC75HC107 Datasheet
