MC88915TFN70 Overview
Pulling the OE/RST pin low puts the clock outputs 2X_Q, Q0 Q4, Q5 and Q/2 into a high impedance state (3 state). After the OE/RST pin goes back high Q0 Q4, Q5 and Q/2 will be reset in the low state, with 2X_Q being the inverse of the selected SYNC input. Assuming PLL_EN is low, the outputs will remain reset until the 88915 sees a SYNC input pulse.