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MC88916DW - LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET

General Description

of the RST_IN/RST_OUT(LOCK) Functionality The RST_IN and RST_OUT(LOCK) pins provide a 68030/040 processor reset function, with the RST_OUT pin also acting as a lock indicator.

up, the RST_OUT pin will be in the low state until steady state p

Key Features

  • z 1. Maximum Operating Frequency is guaranteed with the 88916 in a phase.
  • locked condition, and all outputs loaded at 50Ω terminated to VCC/2.

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MC88916 LOW SKEW CMOS PLL CLOCK DRIVER WITH PROCESSOR RESET
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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document from Logic Marketing Low Skew CMOS PLL Clock Driver With Processor Reset The MC88916 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The RST_IN/RST_OUT(LOCK) pins provide a processor reset function designed specifically for the MC68/EC/LC030/040 microprocessor family. The 88916 comes in two speed grades: 70 and 80MHz. These frequencies correspond to the 2X_Q maximum output frequency. The two grades should be ordered as the MC88916DW70 and MC88916DW80, respectively.