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MC88921DW - LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature

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Part number MC88921DW
Manufacturer Motorola
File Size 106.70 KB
Description LOW SKEW CMOS PLL CLOCK DRIVER With Power-Down/ Power-Up Feature
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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document from Logic Marketing Low Skew CMOS PLL Clock Driver MC88921 With Power-Down/Power-Up Feature The MC88921 Clock Driver utilizes phase–locked loop technology to lock its low skew outputs’ frequency and phase onto an input reference clock. It is designed to provide clock distribution for CISC microprocessor or single processor RISC systems. The PLL allows the high current, low skew outputs to lock onto a single clock input and distribute it with essentially zero delay to multiple locations on a board. The PLL also allows the MC88921 to multiply a low frequency input clock and distribute it locally at a higher (2X) system frequency.
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