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MCM67A518 - 32K x 18 Bit Asynchronous/Latched Address Fast Static RAM

Key Features

  • d of Write Output Buffer Control: W High to Output Valid W High to Output Active W Low to Output High.
  • Z tWHQV tWHQX tWLQZ 10 3 0.
  • 5 12 3 0.
  • 6 15 5 0.
  • 9 tWHAX tEHAX tWHDX tEHDX tWLWH tWLWH tWLEF tELWH tELEH 0 0 0 0 9 8 9 9 9.
  • 0 0 0 0 10 9 10 10 10.
  • 0 0 0 0 1.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM67A518/D 32K x 18 Bit Asynchronous/ Latched Address Fast Static RAM The MCM67A518 is a 589,824 bit latched address static random access memory organized as 32,768 words of 18 bits, fabricated with Motorola’s high– performance silicon–gate BiCMOS technology. The device integrates a 32K x 18 SRAM core with advanced peripheral circuitry consisting of address and data input latches, active low chip enable, separate upper and lower byte write strobes, and a fast output enable. This device has increased output drive capability supported by multiple power pins. Address, data in, and chip enable latches are provided.