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MCM67B618A - 64K x 18 Bit BurstRAM Synchronous Fast Static RAM

Key Features

  • ference Level.
  • 1.5 V Input Pulse Levels.
  • . . . 0 to 3.0 V Input Rise/Fall Time.
  • . 3 ns Output Timing Reference Level.
  • . 1.5 V Output Load.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM67B618A/D 64K x 18 Bit BurstRAM™ Synchronous Fast Static RAM With Burst Counter and Self–Timed Write The MCM67B618A is a 1,179,648 bit synchronous fast static random access memory designed to provide a burstable, high–performance, secondary cache for the i486™ and Pentium™ microprocessors. It is organized as 65,536 words of 18 bits. The device integrates input registers, a 2–bit counter, high speed SRAM, and high drive capability outputs onto a single monolithic circuit for reduced parts count implementation of cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K).