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MCM67J518 - 32K x 18 Bit BurstRAM Synchronous Fast Static RA

Key Features

  • mA.
  • mA V VOH 2.4 3.3 V NOTE: Good decoupling of the local power supply should always be used. DC characteristics are guaranteed for all possible i486, Pentium bus cycles.

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM67J518/D 32K x 18 Bit BurstRAM™ Synchronous Fast Static RAM With Burst Counter and Registered Outputs The MCM67J518 is a 589,824 bit synchronous static random access memory designed to provide a burstable, high–performance, secondary cache for the i486™ and Pentium™ microprocessors. It is organized as 32,768 words of 18 bits, fabricated with Motorola’s high–performance silicon–gate BiCMOS technology. The device integrates input registers, a 2–bit counter, high speed SRAM, and high drive registered output drivers onto a single monolithic circuit for reduced parts count implementation of cache data RAM applications. Synchronous design allows precise cycle control with the use of an external clock (K).