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MCM67P804 - 256K x 4 Bit Synchronous Static RAM

Key Features

  • separate TIL input and output buffers, which are fully 1/0 compatible at 3.3 V, and incorporates input and output registers on board with high speed SRAM. The synchronous design allows for precise cycle control with the use of an external single clock (K). The addresses (AO - A17), Data Input (DO - 03), Data Output (00 - 03), Write Enable (W), and Chip Enable (E) are registered in on the rising edge of Clock (K). The MCM67P804 is available in a 400 mil, 32-lead surface-mount SOJ package.

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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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I . MOTOROLA SEMICONDUCTOR TECHNICAL DATA Product Preview 256K x 4 Bit Synchronous Static RAM with Registered Outputs The Motorola MCM67P804 is a 1,048,576 bit static random access memory organized as 262,144 x 4 bits. This device is fabricated using Motorola's highperformance silicon-gate SiCMOS technology. It features separate TIL input and output buffers, which are fully 1/0 compatible at 3.3 V, and incorporates input and output registers on board with high speed SRAM. The synchronous design allows for precise cycle control with the use of an external single clock (K). The addresses (AO - A17), Data Input (DO - 03), Data Output (00 - 03), Write Enable (W), and Chip Enable (E) are registered in on the rising edge of Clock (K).