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MCM67Q909 - 512K x 9 Bit Separate I/O Synchronous Fast Static RAM

Datasheet Summary

Features

  • separate TTL input and output buffers, which drive 3.3 V output levels, and incorporates input and output registers on.
  • board with high speed SRAM. It also features transparent.
  • write and data pass.
  • through capabilities. The synchronous design allows for precise cycle control with the use of an external single clock (K). The addresses (A0.
  • A18), data input (D0.
  • D8), data output (Q0.
  • Q8), write.
  • enable (W), chip.
  • enable (E), and output.

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Datasheet Details

Part number MCM67Q909
Manufacturer Motorola
File Size 139.15 KB
Description 512K x 9 Bit Separate I/O Synchronous Fast Static RAM
Datasheet download datasheet MCM67Q909 Datasheet
Additional preview pages of the MCM67Q909 datasheet.

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Full PDF Text Transcription

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MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MCM67Q909/D Advance Information MCM67Q909 512K x 9 Bit Separate I/O Synchronous Fast Static RAM The MCM67Q909 is a 4M–bit static random access memory, organized as 512K words of 9 bits. It features separate TTL input and output buffers, which drive 3.3 V output levels, and incorporates input and output registers on–board with high speed SRAM. It also features transparent–write and data pass–through capabilities. The synchronous design allows for precise cycle control with the use of an external single clock (K). The addresses (A0 – A18), data input (D0 – D8), data output (Q0 – Q8), write–enable (W), chip–enable (E), and output–enable (G), are registered on the rising edge of clock (K).
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