MCM67W618 Overview
The device integrates a 64K x 18 SRAM core with advanced peripheral circuitry consisting of address latches, active low chip enable, write en- able, separate upper and lower byte selects, and a fast output enable. This device has increased output drive capability supported by multiple power pins. PIN ASSIGNMENT Address latch enable (AL) is provided to simplify read and write cycles by guaranteeing address hold time...