Datasheet4U Logo Datasheet4U.com

MCM72JG32 - 256KB and 512KB Pipelined BurstRAM Secondary Cache Module

Description

for asynchronous Triton chip set module.

Signals in parentheses will be implemented in future burstable Triton modules.

{ NC for MCM72JG32, A18 for MCM72JG64.

MCM72JG64 2 MOTOROLA FAST SRAM MCM72JG32 MODULE BLOCK DIAGRAM 32K x 8 TIO0 TIO7 TWE 13 A5

Features

  • ection: There is no connection to the module.

📥 Download Datasheet

Datasheet preview – MCM72JG32

📁 Similar Datasheet

  • MCM03P02A - P-Channel MOSFET (MCC)
  • MCM1206 - P-Channel MOSFET (MCC)
  • MCM1208 - P-Channel MOSFET (MCC)
  • MCM1216 - P-Channel MOSFET (MCC)
  • MCM1216A - P-CHANNEL MOSFET (MCC)
  • MCM145101 - 1024-Bit Static RAM (Motorola Semiconductor)
  • MCM1451L01 - 1024-Bit Static RAM (Motorola Semiconductor)
  • MCM1567 - P-CHANNEL MOSFET (MCC)
  • MCM2016H - Fast 16K-Bit Sratic RAM (Motorola Semiconductor)
  • MCM207 - Micro System Service Manual (Philips)
Other Datasheets by Motorola
  • MCM72JG64 - 256KB and 512KB Pipelined BurstRAM Secondary Cache Module
  • MCM72BA32 - 256KB and 512KB BurstRAM Secondary Cache
  • MCM72BA64 - 256KB and 512KB BurstRAM Secondary Cache
  • MCM72BB32 - 256KB and 512KB BurstRAM Secondary Cache
  • MCM72BB64 - 256KB and 512KB BurstRAM Secondary Cache
  • MCM72BF32 - 256KB and 512KB BurstRAM Secondary Cache
  • MCM72BF64 - 256KB and 512KB BurstRAM Secondary Cache
  • MCM72CB32 - 256KB and 512KB BurstRAM Secondary Cache Module

Full PDF Text Transcription

Click to expand full text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order Order this this document document by by MCM72JG32/D MCM72JG32/D Advance Information 256K and 512K Pipelined BurstRAM™ Sedcondary Cache Module for Pentium™ The MCM72JG32 and MCM72JG64 are designed to provide a burstable, high performance, 256K/512K L2 cache for the Pentium microprocessor in conjunction with Intel’s Triton chip set. The modules are configured as 32K x 64 and 64K x 64 bits in a 160 pin card edge memory module. Each module uses four of Motorola’s 5 V 32K x 18 or 64K x 18 BurstRAMs and one Motorola 5 V 32K x 8 FSRAM for the tag RAM. Bursts can be initiated with either address status processor (ADSP) or cache address status (CADS).
Published: |