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MPC2005 - 256KB and 512KB BurstRAM

Download the MPC2005 datasheet PDF. This datasheet also covers the MPC2004 variant, as both devices belong to the same 256kb and 512kb burstram family and are provided as variant models within a single manufacturer datasheet.

General Description

of the cache module.

The module family pinout will support 5 V and 3.3 V components for a clear path to lower voltage and power savings.

Both power supplies must be connected.

Key Features

  • d all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (MPC2004_Motorola.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC2004/D Advance Information 256KB and 512KB BurstRAM™ Secondary Cache Modules for PowerPC™ PReP/CHRP Platforms The MPC2004 and MPC2005 are designed to provide burstable, high performance 256KB/512KB L2 cache for the PowerPC 60x microprocessor family in conformance with the PowerPC Reference Platform (PReP) and the PowerPC Common Hardware Reference Platform (CHRP) specifications. The modules are configured as 32K x 72 and 64K x 72 bits in a 182 (91 x 2) pin DIMM format. Each module uses four of Motorola’s 5 V 32K x 18 or 64K x 18 BurstRAMs and a 5 V cache tag RAM configured as 16K x 12 for tag field plus 16K x 2 for valid and dirty status bits. Bursts can be initiated with the SRAMADS signal.