MPC9315 Overview
The MPC9315 utilizes PLL technology to frequency and phase lock its outputs onto an input reference clock. Normal operation requires a connection of one of the device outputs to the selected feedback (FB0 or FB1) input to close the PLL feedback path. The reference clock frequency and the output divider for the feedback path determine the VCO frequency.
MPC9315 Key Features
- Fully integrated PLL supports spread spectrum clocking
- Supports