MTD15N06VL Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTD15N06VL/D ™ TMOS V ™ Designer's Data Sheet MTD15N06VL Power Field Effect Transistor DPAK for Surface Mount N Channel Enhancement Mode Silicon Gate TMOS V is a new technology designed to achieve an on resistance area product about one half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS...
MTD15N06VL Key Features
- On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
- Faster Switching than E-FET Predecessors
- Avalanche Energy Specified
- IDSS and VDS(on) Specified at Elevated Temperature
- Static Parameters are the Same for both TMOS V and TMOS E-FET
- Surface Mount Package Available in 16 mm 13-inch/2500 Unit Tape & Reel, Add T4 Suffix to Part Number MAXIMUM RATINGS (TC
- Continuous Gate-to-Source Voltage
- Non-repetitive (tp ≤ 10 ms) Drain Current
- Continuous Drain Current
- Continuous @ 100°C Drain Current
MTD15N06VL Applications
- On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
