MTP30P06V Overview
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTP30P06V/D Designer's TMOS V Power Field Effect Transistor P Channel Enhancement Mode Silicon Gate TMOS V is a new technology designed to achieve an on resistance area product about one half that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS E FET designs, TMOS...
MTP30P06V Key Features
- On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
- Faster Switching than E-FET Predecessors Features mon to TMOS V and TMOS E-FETS
- Avalanche Energy Specified
- IDSS and VDS(on) Specified at Elevated Temperature
- Static Parameters are the Same for both TMOS V and TMOS E-FET MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
- Continuous Gate-to-Source Voltage
- Non-repetitive (tp ≤ 10 ms) Drain Current
- Continuous @ 25°C Drain Current
- Continuous @ 100°C Drain Current
- Single Pulse (tp ≤ 10 µs) Total Power Dissipation @ 25°C Derate above 25°C Operating and Storage Temperature Range Singl
MTP30P06V Applications
- On-resistance Area Product about One-half that of Standard MOSFETs with New Low Voltage, Low RDS(on) Technology
- Faster Switching than E-FET Predecessors Features mon to TMOS V and TMOS E-FETS
