Motorola SN54LS353
the SN54 / 74LS253 Schottky Process for High Speed Multifunction Capability Input Clamp Diodes Limit High Speed Termination Effects CONNECTION DIAGRAM DIP (TOP VIEW) VCC 16 E0b 15 S0 14 I3b 13 I2b 12 I1b 11 I0b 10 Zb 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.DESCRIPTION
The SN54 / 74LS353 contains two identical 4-input Multiplexers with 3-state outputs. They select two bits from four sources selected by common select inputs (S0, S1). The 4-input multiplexers have individual Output Enable (E0a, E0b) inputs which when HIGH, forces the outputs to a high impedance (high Z) state. The logic equations for the outputs are shown below: Za = E0a● (I0a
● S1
● S0 + I1a
● S1
● S0 + I2a
● S1
● S0 + I3a
● S1
● S0) Zb = E0b
● (I0b
● S1
● S0 + I1b
● S1
● S0 + I2b
● S1
● S0 + I3b
● S1
● S0) If the outputs of 3-state devices are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. Designers should ensure that Output Enable signals to 3-state devices whose outputs are tied together are designed so that there is no overlap. TRUTH TABLE SELECT INPUTS S0 X L L H H L L H H S1 X L L L L H H H H I0 X L H X X X X X X DATA INPUTS I1 X X X L H X X X X I2 X X X X X L H X X I3 X X X X X X X...