Datasheet4U Logo Datasheet4U.com

SN54LS379 - OCTAL D FLIP-FLOP

This page provides the datasheet information for the SN54LS379, a member of the SN54LS377 OCTAL D FLIP-FLOP family.

Features

  • the common Enable rather then common Master Reset.
  • 8-Bit High Speed Parallel Registers.
  • Positive Edge-Triggered D-Type Flip Flops.
  • Fully Buffered Common Clock and Enable Inputs.
  • True and Complement Outputs.
  • Input Clamp Diodes Limit High Speed Termination Effects PIN NAMES.

📥 Download Datasheet

Datasheet preview – SN54LS379

Datasheet Details

Part number SN54LS379
Manufacturer Motorola
File Size 250.77 KB
Description OCTAL D FLIP-FLOP
Datasheet download datasheet SN54LS379 Datasheet
Additional preview pages of the SN54LS379 datasheet.
Other Datasheets by Motorola

Full PDF Text Transcription

Click to expand full text
OCTAL D FLIP-FLOP WITH ENABLE; HEX D FLIP-FLOP WITH ENABLE; 4-BIT D FLIP-FLOP WITH ENABLE The SN54 / 74LS377 is an 8-bit register built using advanced Low Power Schottky technology. This register consists of eight D-type flip-flops with a buffered common clock and a buffered common clock enable. The SN54 / 74LS378 is a 6-Bit Register with a buffered common enable. This device is similar to the SN54 / 74LS174, but with common Enable rather than common Master Reset. The SN54 / 74LS379 is a 4-Bit Register with buffered common Enable. This device is similar to the SN54 / 74LS175 but features the common Enable rather then common Master Reset.
Published: |