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4-BIT D LATCH
The SN54/ 74LS375 is a 4-Bit D-Type Latch for use as temporary storage for binary information between processing limits and input /output or indicator units. When the Enable (E) is HIGH, information present at the D input will be transferred to the Q output and, if E is HIGH, the Q output will follow the input. When E goes LOW, the information present at the D input prior to its setup time will be retained at the Q outputs.
VCC 16
CONNECTION DIAGRAM DIP (TOP VIEW)
D3
Q3
Q3
E2,3
Q2
Q2
D2
15
14
13
12
11
10
9
NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package.
1 D0
2 Q0
3 Q0
4 E0,1
5 Q1
6 Q1
7 D1
8 GND
TRUTH TABLE (Each latch)
tn tn+1
DQ HH LL
NOTES:
tn = bit time before enable negative-going transition.