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SN74LS74A - DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP

Download the SN74LS74A datasheet PDF. This datasheet also covers the SN74LS74 variant, as both devices belong to the same dual d-type positive edge-triggered flip-flop family and are provided as variant models within a single manufacturer datasheet.

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Note: The manufacturer provides a single datasheet file (SN74LS74_MotorolaInc.pdf) that lists specifications for multiple related part numbers.

📁 Similar Datasheet

Part Number Description Manufacturer
SN74LS74A Dual D-Type Positive Edge-Triggered Flip-Flop ON Semiconductor
SN74LS74A Dual D-Type Positive-Edge Triggered Flip-Flops Texas Instruments
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Other Datasheets by Motorola Semiconductor (now NXP Semiconductors)

Part Number Description
SN74LS748 10-LINE-TO-4-LINE AND 8-LINE-TO-3-LINE PRIORITY ENCODERS
SN74LS73A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP
SN74LS75 4-BIT D LATCH LOW POWER SCHOTTKY
SN74LS76A Dual JK Filp-Flop
SN74LS77 4-BIT D LATCH LOW POWER SCHOTTKY

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DUAL D-TYPE POSITIVE EDGE-TRIGGERED FLIP-FLOP The SN54 / 74LS74A dual edge-triggered flip-flop utilizes Schottky TTL circuitry to produce high speed D-type flip-flops. Each flip-flop has individual clear and set inputs, and also complementary Q and Q outputs. Information at input D is transferred to the Q output on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level of the clock pulse and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the HIGH or the LOW level, the D input signal has no effect.