TY30N50E Datasheet | Motorola Semiconductor

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MTY30N50E/D Designer's TMOS E-FET .™ Power Field Effect Transistor N- Channel Enhancement- Mode Silicon Gate This advanced TMOS power FET is designed to withstand high energy in the avalanche and mutation modes. This new energy efficient design also offers a drain- to- source diode with fast recovery time. Designed for high voltage, high speed switching applications in power supplies, converters, PWM motor controls, and other inductive loads. The avalanche energy capability is specified to eliminate the guesswork in designs where inductive .. loads are switched and offer additional safety margin against unexpected voltage transients. - Avalanche Energy Specified - Diode is Characterized for Use in Bridge Circuits - IDSS and VDS(on) Specified at Elevated Temperature ™ Data Sheet MTY30N50E Motorola Preferred Device TMOS POWER FET 30 AMPERES 500 VOLTS RDS(on) = 0.15 OHM ® G S Symbol VDSS VDGR VGS VGSM ID IDM PD TJ, Tstg EAS RθJC RθJA TL CASE 340G- 02, STYLE 1 TO- 264 MAXIMUM RATINGS (TC = 25°C unless otherwise noted) Rating Drain- Source Voltage Drain- Gate Voltage (RGS = 1 MΩ) Gate- Source Voltage - Continuous Gate- Source Voltage - Non- Repetitive (tp ≤ 10 ms) Drain Current - Continuous @ TC = 25°C Drain Current - Single Pulse (tp ≤ 10 µs) Total Power Dissipation Derate above 25°C Operating and Storage Temperature Range Single Pulse Drain- to- Source Avalanche Energy - Starting TJ = 25°C (VDD = 100 Vdc, VGS = 10 Vdc, Peak IL = 30 Apk, L = 10 m H, RG = 25 Ω ) Thermal Resistance - Junction to Case Thermal Resistance - Junction to Ambient Maximum Lead Temperature for Soldering Purposes, 1/8″ from case for 10 seconds Value 500 500 ± 20 ± 40 30 80 300 2.38 - 55 to 150 3000 0.42 40 260 Unit Vdc Vdc Vdc Vpk Adc Apk Watts W/°C °C m J °C/W °C Designer’s Data for “Worst Case” Conditions - The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves -...