SN54LS122 Overview
Key Specifications
Package: CDIP
Key Features
- An external timing capacitor may be connected between Cext and Rext/Cext (positive)
- To use the internal timing resistor of the LS122, connect Rint to VCC
- For improved pulse width accuracy connect an external resistor between Rext/Cext and VCC with Rint open-circuited
- To obtain variable pulse widths, connect an external variable resistance between Rint/Cext and VCC
