NCR53C94 Datasheet | NCR Microelectronics

NCR 53C94, 53C95, 53C96 Advanced SCSI Controller General Description The 53C94, 53C95 and 53C96 are high performance CMOS devices conforming to the ANSI standard, X3.l3I-I986, for Small puter Systems Interface (SCSI). They are a super-set of the 53C90 with additional mands, registers and an I8-bit DMA interface (two parity bits). The microprocessor bus width is 8-bits, and may be configured to be separate from the I8-bit DMA bus (called dual bus) or share the lower half (called single bus). The 53C94 has on-chip 48 rn A drivers for single ended transmission, while the 53C95 provides control signals for external differential trancei verso The 53C96 offers both single ended and differential mode in a single 100 pin Quad Flat Pack (QFP) package. The 53C90 Family reduces protocol overhead by performing mon SCSI algorithms, or sequences, in response to a single mand. The 53C94 and 53C95 will operate at sustained data tansfer rates up to 5 MB/S in synchronous mode and 5 MB/S in asynchronous mode. Refer to Data Transfer Rate. Features - ANSI X3.13I-I986 patible - On-chip 48 rn A drivers - Control logic for differential tranceivers - Parity generation, optional checking - Parity pass-thru - Software patible with 53C90 - SCSI-2 tagged -queuing - I8-bit DMA interface - Dual bus or single bus processor and DMA - Multiplexed or nonmultiplexed address/data - Burst mode - 20 MB/S DMA interface - Up to 5 MB/S asynchronous SCSI - Up to 5 MB/S synchronous SCSI - Low power CMOS - 84-pin PLCC and 100-pin QFP Figure 1. Functional Block Diagram 18-Bit DMA Bus ~t-r--..011!"-""'''; 8-Bit Host Processor Bus RD/ WR/ CS/ DACK/ A3-Al E A2-DBRD/ A1-BHE AO-SAO DBWR/ ---I~~1IIoi I t..".""..--.......---.....................--...........,.J INT/ ..-+:-~-,..~~~--..,.....,......... Cl K --~~~~~~~~~~~ NCR SCSI Products SCSI Data Bus Single Ended Inputs or Differential 110 SCSI Data Bus Single Ended Outputs or Differential...