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D64084 - UPD64084

General Description

The µPD64084 realizes a high precision Y/C separation by the three-dimension signal processing for NTSC signal.

Key Features

  • On-chip 4-Mbit frame delay memory. 2 operation mode Motion adaptive 3D Y/C separation 2D Y/C separation + Frame recursive Y/C NR.
  • Embedded 10-bit A/D converter (1ch), 10-bit D/A converters (2ch), and System clock generator. Embedded Y coring, Vertical enhancer, Peaking filter, and Noise detector. Embedded ID-1 signal decoder, and WCV-ID signal decoder. I2C bus control. Dual power supply of 2.5 V and 3.3 V. For digital : DVDD.

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D64082 THREE-DIMENSIONAL Y/C SEPARATION LSI
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Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

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DATA SHEET MOS INTEGRATED CIRCUIT µPD64084 THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY DESCRIPTION The µPD64084 realizes a high precision Y/C separation by the three-dimension signal processing for NTSC signal. This product has the on-chip 4-Mbit memory for flame delay, a high precision internal 10-bit A/D converter and D/A converter, and adapting 10-bit signal processing (only for luminance signal) and high picture quality. The µPD64084 is completely single-chip system of 3D Y/C separation. This LSI includes the Wide Clear Vision ID signal (Japanese local format) decoder and ID-1 signal decoder. FEATURES • • On-chip 4-Mbit frame delay memory.