UPB1005K Description
The µPB1005K is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip.
UPB1005K Key Features
- Double conversion
- Integrated RF block : fREFin = 16.368 MHz, f2ndIFout = 4.092 MHz : RF/IF frequency down-converter + PLL frequency synthe
- High-density surface mountable : 36-pin plastic QFN (6.0 × 6.0 × 0.95 mm)
- Needless to input counter data : fixed division internal prescaler
- VCO side division
- Reference division
- Supply voltage
- Low current consumption
- Gain adjustable externally : ÷ 200 (÷ 25, ÷ 8 serial prescaler) : ÷2 : VCC = 2.7 to 3.3 V : ICC = 45.0 mA TYP.@VCC = 3.0
- Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz