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UPD42S17405LG3-A50-7JD - 3.3V OPERATION 16M-BIT DYNAMIC RAM

This page provides the datasheet information for the UPD42S17405LG3-A50-7JD, a member of the UPD42S17405L 3.3V OPERATION 16M-BIT DYNAMIC RAM family.

Datasheet Summary

Description

The µPD42S17405L, 4217405L are 4,194,304 words by 4 bits CMOS dynamic RAMs with optional EDO.

EDO is a kind of the page mode and is useful for the read operation.

Besides, the µPD42S17405L can execute CAS before RAS self refresh.

Features

  • EDO (Hyper page mode).
  • 4,194,304 words by 4 bits organization.
  • Single +3.3 V ±0.3 V power supply.
  • Fast access and cycle time Power consumption Active (MAX. ) 660 mW 360 mW 324 mW Part number Access time (MAX. ) 50 ns 60 ns 70 ns R/W cycle time (MIN. ) 84 ns 104 ns 124 ns EDO (Hyper page mode) cycle time (MIN. ) 20 ns 25 ns 30 ns µPD42S17405L-A50, 4217405L-A50 µPD42S17405L-A60, 4217405L-A60 µPD42S17405L-A70, 4217405L-A70.
  • µPD42S17405L can execute CA.

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Datasheet preview – UPD42S17405LG3-A50-7JD

Datasheet Details

Part number UPD42S17405LG3-A50-7JD
Manufacturer NEC
File Size 332.16 KB
Description 3.3V OPERATION 16M-BIT DYNAMIC RAM
Datasheet download datasheet UPD42S17405LG3-A50-7JD Datasheet
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Full PDF Text Transcription

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DATA SHEET µPD42S17405L, 4217405L 3.3 V OPERATION 16 M-BIT DYNAMIC RAM 4 M-WORD BY 4-BIT, EDO MOS INTEGRATED CIRCUIT Description The µPD42S17405L, 4217405L are 4,194,304 words by 4 bits CMOS dynamic RAMs with optional EDO. EDO is a kind of the page mode and is useful for the read operation. Besides, the µPD42S17405L can execute CAS before RAS self refresh. The µPD42S17405L, 4217405L are packaged in 26-pin plastic TSOP (II) and 26-pin plastic SOJ. Features • EDO (Hyper page mode) • 4,194,304 words by 4 bits organization • Single +3.3 V ±0.3 V power supply • Fast access and cycle time Power consumption Active (MAX.) 660 mW 360 mW 324 mW Part number Access time (MAX.) 50 ns 60 ns 70 ns R/W cycle time (MIN.) 84 ns 104 ns 124 ns EDO (Hyper page mode) cycle time (MIN.
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