UPD44164184 - (UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION

This page provides the datasheet information for the UPD44164184, a member of the UPD44164084 (UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION family.

Product Overview

NEC

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UPD44164184 (UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION by NEC - Datasheet Preview — Datasheet preview – UPD44164184

Datasheet Details

Part number	UPD44164184
Manufacturer	NEC
File Size	394.10 KB
Description	(UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION
Datasheet	UPD44164184 Datasheet
Additional preview pages of the UPD44164184 datasheet.

UPD44164184 Product details

Description

technology using full CMOS six-transistor memory cell.

Features

1.8 ± 0.1 V power supply and HSTL I/O.
DLL circuitry for wide output data valid window and future frequency scaling.
Pipelined double data rate operation.
Common data input/output bus.
Four-tick burst for reduced address frequency.
Two input clocks (K and /K) for precise DDR timing at clock rising edges only.
Two output clocks (C and /C) for precise flight time and clock skew matching-clock and data delivered together to receiving d.

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Other Datasheets by NEC

UPD44164182 - (UPD44164082/182/362) 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164185 - (UPD44164085/185/365) 18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
UPD44164082 - (UPD44164082/182/362) 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164084 - (UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION
UPD44164085 - (UPD44164085/185/365) 18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION
UPD44164362 - (UPD44164082/182/362) 18M-BIT DDRII SRAM 2-WORD BURST OPERATION
UPD44164364 - (UPD44164084/184/364) 18M-BIT DDRII SRAM 4-WORD BURST OPERATION
UPD44164365 - (UPD44164085/185/365) 18M-BIT DDRII SRAM SEPARATE I/O 2-WORD BURST OPERATION

Published: Feb 16, 2006 |