UPD44321182
Overview
The µPD44321182 is a 2,097,152-word by 18-bit and the µPD44321362 is a 1,048,576-word by 36-bit ZEROSB static RAM fabricated with advanced CMOS technology using full CMOS six-transistor memory cell. The µPD44321182 and µPD44321362 are optimized to eliminate dead cycles for read to write, or write to read transitions.
- Low voltage core supply : VDD = 3.3 ± 0.165 V / 2.5 ± 0.125 V
- Synchronous operation
- 100 percent bus utilization
- Internally self-timed write control
- Burst read / write : Interleaved burst and linear burst sequence
- Fully registered inputs and outputs for pipelined operation
- All registers triggered off positive clock edge
- 3.3V or 2.5V LVTTL Compatible : All inputs and outputs
- Fast clock access time : 3.2 ns (200 MHz)
- Asynchronous output enable : /G
