UPD72852 Description
DATA SHEET MOS INTEGRATED CIRCUIT µPD72852 IEEE1394a-2000 PLIANT 400 Mbps TWO-PORT PHY LSI The µPD72852 is a two-port physical layer LSI that plies with the IEEE1394a-2000 specifications. The µPD72852 supports transfers of up to 400 Mbps and consumes less power than the µPD72850B. The µPD72852 is suitable for battery systems with an IEEE1394 interface.
UPD72852 Key Features
- The two-port physical layer LSI plies with IEEE1394a-2000
- Fully interoperable with IEEE1394 std 1394 Link (FireWireTM, i.LINKTM)
- Meets IntelTM Mobile Power Guideline 2000
- Full IEEE1394a-2000 support includes: Suspend/Resume, connection debounce, arbitrated short bus reset, multispeed concat
- Fully pliant with OHCI requirements
- Small package: 64-pin plastic LQFP
- Super low power: 68 mA (Operating mode) : 115 µA (Suspend mode)
- Data rate: 400/200/100 Mbps
- Supports PHY pinging and remote PHY access packets
- 3.3 V single power supply (if power not supplied via node: 3.0 V single power supply)