UPD72852A Description
DATA SHEET MOS INTEGRATED CIRCUIT µPD72852A IEEE1394a-2000 PLIANT 400 Mbps TWO-PORT PHY LSI The µPD72852A is a two-port physical layer LSI that plies with the IEEE1394a-2000 specifications.
UPD72852A Key Features
- The two-port physical layer LSI plies with IEEE1394a-2000
- Fully interoperable with IEEE1394 std 1394 Link (FireWireTM, i.LINKTM)
- Meets IntelTM Mobile Power Guideline 2000
- Full IEEE1394a-2000 support includes: Suspend/Resume, connection debounce, arbitrated short bus reset, multi-speed conca
- Suspend Debounce timer for ESD
- Double speed signal filter for BIAS Ringing
- Small package: 64-pin plastic LQFP
- Super low power : 68 mA (Operating mode) : 115 µA (Suspend mode)
- Data rate: 400/200/100 Mbps