S7A401830M - 128Kx36 & 256Kx18 Sync-Pipelined Burst SRAM

This page provides the datasheet information for the S7A401830M, a member of the S7A403630M 128Kx36 & 256Kx18 Sync-Pipelined Burst SRAM family.

Product Overview

Part number	S7A401830M
Manufacturer	NETSOL
File Size	473.62 KB
Description	128Kx36 & 256Kx18 Sync-Pipelined Burst SRAM
Datasheet	S7A401830M Datasheet
Additional preview pages of the S7A401830M datasheet.

The S7A403630M and S7A401830M are 4,718,592-bit Synchronous Static Random Access Memory designed for high performance.

VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply.
VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V).
Synchronous Operation.
2 Stage Pipelined operation with 4 Burst.
On-Chip Address Counter.
Self-Timed Write Cycle.
On-Chip Address and Control Registers.
Byte Writable Function.
Global Write Enable Controls a full bus-width write.
Power Down State via ZZ Signal.

Other Datasheets by NETSOL

Published: Oct 13, 2018 |