NETSOL S7A401830M
The S7A403630M and S7A401830M are 4,718,592-bit Synchronous Static Random Access Memory designed for high performance. It is organized as 128K(256K) words of 36(18) bits and integrates address and control registers, a 2-bit burst address counter and added some new functions for high performance applications; GW, BW, LBO, ZZ. The S7A403630M and S7A401830M are fabricated using high performance CMOS technology and is available in a 100pin TQFP package.FEATURES
● VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply● VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or 2.3V~3.5V I/O Power Supply (VDD=3.3V)
● Synchronous Operation
● 2 Stage Pipelined operation with 4 Burst
● On-Chip Address Counter
● Self-Timed Write Cycle
● On-Chip Address and Control Registers
● Byte Writable Function
● Global Write Enable Controls a full bus-width write
● Power Down State via ZZ Signal
● LBO Pin allows a choice of either a interleaved burst or a lin- ear burst
● Three Chip Enables for simple depth expansion with No Data Contention only for TQFP ; 2cycle Enable, 1cycle Disable
● Asynchronous Output Enable Control
● ADSP, ADSC, ADV Burst Control Pins
● TTL-Level Three-State Output
● Operating in commeical and industrial temperature range
● 100-TQFP-1420A (Lead free package)
GENERAL DESCRIPTION
Write cycles are internally selftimed and synchronous. Full bus-width write is done by GW, and each byte write is performed by the combination of WEx and BW when GW is high.