Download the S7A641830M datasheet PDF.
This datasheet also covers the S7A643630M variant, as both devices belong to the same 2mx36 & 4mx18 sync-pipelined burst sram family and are provided as variant models within a single manufacturer datasheet.
General Description
The S7A643630M and S7A641830M are 75,497,472-bit Synchronous Static Random Access Memory designed for high performance.
Key Features
VDD = 2.5V(2.3V ~ 2.7V) or 3.3V(3.1V ~ 3.5V) Power Supply.
VDDQ = 2.3V~2.7V I/O Power Supply (VDD=2.5V) or
2.3V~3.5V I/O Power Supply (VDD=3.3V).
Synchronous Operation.
2 Stage Pipelined operation with 4 Burst.
On-Chip Address Counter.
Self-Timed Write Cycle.
On-Chip Address and Control Registers.
Byte Writable Function.
Global Write Enable Controls a full bus-width write.
Full PDF Text Transcription for S7A641830M (Reference)
Note: Below is a high-fidelity text extraction (approx. 800 characters) for
S7A641830M. For precise diagrams, and layout, please refer to the original PDF.
c-Pipelined Burst SRAM 72Mb Sync. Pipelined Burst SRAM Specification NETSOL RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS WITHOUT NOTICE. Products and specifications discussed herein are for reference purposes only. All information discussed herein is provided on an "AS IS" basis, without warranties of any kind. This document and all information discussed herein remain the sole and exclusive property of NETSOL. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by one party to the other party under this document, by implication, estoppel or
S7A641830M Datasheet
