Datasheet Details
| Part number | S7K1618T2M |
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| Manufacturer | NETSOL |
| File Size | 361.74 KB |
| Description | 512Kx36 & 1Mx18 DDRII+ CIO BL2 SRAM |
| Datasheet |
 S7K1618T2M Datasheet
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General Description
The S7K1636T2M and S7K1618T2M are 18,874,368-bits DDR Common I/O Synchronous Pipelined Burst SRAMs.
They are organized as 524,288 words by 36bits for S7K1636T2M and 1,048,576 words by 18 bits for S7K1618T2M .
Key Features
- 1.8V+0.1V/-0.1V Power Supply.
- DLL circuitry for wide output data valid window and future freguency scaling.
- I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/ -0.1V for 1.8V I/O.
- Pipelined, double-data rate operation.
- Common data input/output bus.
- HSTL I/O.
- Full data coherency, providing most current data.
- Synchronous pipeline read with self timed late write.
- Read latency : 2 clock cycles.