S7K1618T2M Overview
The S7K1636T2M and S7K1618T2M are 18,874,368-bits DDR.
S7K1618T2M Key Features
- 1.8V+0.1V/-0.1V Power Supply. -DLL circuitry for wide output data valid window and future
- I/O Supply Voltage 1.5V+0.1V/-0.1V for 1.5V I/O, 1.8V+0.1V/
- 0.1V for 1.8V I/O
- Pipelined, double-data rate operation
- mon data input/output bus
- HSTL I/O
- Full data coherency, providing most current data
- Synchronous pipeline read with self timed late write
- Read latency : 2 clock cycles
- Registered address, control and data input/output